Summary

T3BwP® (TXC-06826) is a RISC processor based device that supports the requirements of next-generation channelized DS3 access systems. T3BwP integrates an M13 multiplexer, 28 DS1 framers, and a 672-channel DS0 cross-connect with an embedded high-performance microprocessor to provide a complete channelized DS3 solution on a single chip. The embedded processor runs the device driver and allows communication to an external host via high-level API messages. The device drivers are provided by TranSwitch and loaded from an external serial EEPROM at device bootup.

The T3BwP can be configured to support a variety of modes of operation, which allows for design flexibility. T3BwP supports a combination of transparent,, transmission DS1 and H.100/H.110 bus or MVIP system interface on the terminal side and either fractional DS3 or DS1 on the line side. For TDM applications, all 672 DS0 channels can be switched to any of the 4096 H.100 computer telephony bus channels. The T3BwP can also be enabled to provide DS3 C bit parity for unchannelized services.

The on-chip software provides the control and management plane functionality to the host to configure, control and monitor the DS3, DS1, DS0 and digital cross-connect functions. The standards based MIB functionality is provided for network management.

T3BwP is a Registered Trademark of TranSwitch Corporation

Features

• Complete single-chip channelized DS3 solution
• RISC processor for embedded device driver support
• Host communication via message-based API
• Integrated 672-channel DS0 cross-connect supports grooming, concentration, switching and multiplexing
• Integrated DS1 cross-connect
• One DS3 line interface or 28 DS1 line interfaces
• Combination of Unframed DS1, transmission DS1, and either MVIP or H.100/H.110 as terminal interfaces
• 4096-channel time slot interchange for H.100/H.110 bus
• Detect, switch, and report the clock source quality for H.100/H110 bus
• Provide DS3 clear channel function
• Maintenance of performance objects as per RFC 2495, RFC 2496, and RFC 2494
• Two DS1 monitor ports for monitoring of any DS1 clock and data
• Test Access Port (IEEE 1149.1 boundary scan)
• +3.3 V and +1.8 V power supplies
• 456-lead plastic ball grid array package (27 mm x 27 mm)