Transwitch has inked a development pact with Octasic, under which the companies have created a reference design for voice-over-IP (VoIP) gateway designs.

The joint reference design combines Transwitch's TEPro access processor with Octasic's OCT8304 and OCT6100 VoIP processors. The RISC-based TEPro processor integrates M13/G.747 multiplexer, DS3 framer, 28-channel DS1 framer, 21-channel E1 framer, 28-channel DS1/E1 cross-connect, and 672 DS0 x 4,096 time slot non-blocking cross-connect

The OCT8304 is a packetization engine offers a 1023 channel capacity and provides G.711 packetization for VoIP and VoATM. The OCT6100 is an echo canceller performs carrier-class transparent echo cancellation and voice quality enhancements (VQE). This chip offers 32 to 672 channels of G.168-2002 echo cancellation, 128-ms tail/channel, and adaptive noise reduction.

The Octasic and TranSwitch devices are interconnected through an H.110 interface. The reference design is available now.